cmake: Convert check_cxx_source_compiles_with_flags to a function

cmake/introspection.cmake

@@ -164,7 +164,7 @@ if(NOT MSVC)
 
   # Check for SSE4.1 intrinsics.
   set(SSE41_CXXFLAGS -msse4.1)
-  check_cxx_source_compiles_with_flags("${SSE41_CXXFLAGS}" "
+  check_cxx_source_compiles_with_flags("
     #include <immintrin.h>
 
     int main()
@@ -175,12 +175,13 @@ if(NOT MSVC)
       return _mm_extract_epi32(r, 3);
     }
     " HAVE_SSE41
+    CXXFLAGS ${SSE41_CXXFLAGS}
   )
   set(ENABLE_SSE41 ${HAVE_SSE41})
 
   # Check for AVX2 intrinsics.
   set(AVX2_CXXFLAGS -mavx -mavx2)
-  check_cxx_source_compiles_with_flags("${AVX2_CXXFLAGS}" "
+  check_cxx_source_compiles_with_flags("
     #include <immintrin.h>
 
     int main()
@@ -189,12 +190,13 @@ if(NOT MSVC)
       return _mm256_extract_epi32(l, 7);
     }
     " HAVE_AVX2
+    CXXFLAGS ${AVX2_CXXFLAGS}
   )
   set(ENABLE_AVX2 ${HAVE_AVX2})
 
   # Check for x86 SHA-NI intrinsics.
   set(X86_SHANI_CXXFLAGS -msse4 -msha)
-  check_cxx_source_compiles_with_flags("${X86_SHANI_CXXFLAGS}" "
+  check_cxx_source_compiles_with_flags("
     #include <immintrin.h>
 
     int main()
@@ -205,12 +207,13 @@ if(NOT MSVC)
       return _mm_extract_epi32(_mm_sha256rnds2_epu32(i, j, k), 0);
     }
     " HAVE_X86_SHANI
+    CXXFLAGS ${X86_SHANI_CXXFLAGS}
   )
   set(ENABLE_X86_SHANI ${HAVE_X86_SHANI})
 
   # Check for ARMv8 SHA-NI intrinsics.
   set(ARM_SHANI_CXXFLAGS -march=armv8-a+crypto)
-  check_cxx_source_compiles_with_flags("${ARM_SHANI_CXXFLAGS}" "
+  check_cxx_source_compiles_with_flags("
     #include <arm_neon.h>
 
     int main()
@@ -222,6 +225,7 @@ if(NOT MSVC)
       vsha256su1q_u32(a, b, c);
     }
     " HAVE_ARM_SHANI
+    CXXFLAGS ${ARM_SHANI_CXXFLAGS}
   )
   set(ENABLE_ARM_SHANI ${HAVE_ARM_SHANI})
 endif()